Computer Architecture
Binary #
2's complement #
Minimum: $-2^{n-1}$, Maximum: $2^{n-1} - 1$
Number negation:
- Take the complement
- Add 1
IEEE Floating Point #
Standard for representing floating point numbers.
A 32-bit floating point number has:
- 1 bit sign (positive or negative)
- 8 bit exponent
- 23 bit fraction
Convert decimal to IEEE Floating Point:
- Assign the sign accordingly and continue with the positive part the number
- Write your number in base-2 using fixed point notation
- Put your number in scientific notation (move the fixed point)
- The exponent is 127 + power of scientific notation in binary
- The fraction is the fractional part left over
Binary Coded Decimal #
4 bits represent the numbers one to 9, if another decimal digit is required 4 bits are added.
Logic circuits #
Transistors #
- Metal Oxide Semiconductor (MOS): Type of transistor most modern computers are made of
- Source: Higer voltage current
- Drain: Lower voltage current
- Gate: Electronic gate that can be opened or closed based on transistor type
- N-type MOS transistor: Closed if gate is powered, open when gate isn't powered
- P-type MOS transistor: Closed 'by default', open when gate is powered
- Complementary MOS (CMOS) circuits:: Circuits that both contain P-type and N-type transistors because they act in a complementary way
Logic Gates #
Know your logic :).
- NOT
- (N)AND
- (N)OR
- XOR
Note that both NAND and NOR are logically complete, you can create any other circuit by combining NAND or NOR gates.
Combinational logic circuits #
- Decoder: Decodes a bit pattern, has an output for every possible input permutation
- Multiplexer (MUX): Selects an input to connect to the output based on the select signal
- Full Adder (1 bit adder): Calculates the sum of two bits and a carry-in, also produces a carry-out. Can be chained to sum larger numbers.
Memory #
Address space: Total number of uniquely identifiable memory locations
Addressibiliy: Number of bits stored in each memory location
x-by-y-bit memory: Memory with an address space of x and an adressibility of y.
Memory Address Register (MAR): The address of the memory cell to load/store
Memory Data Register (MDR): The contents/data of the loaded/stored memory cell
R-S Latch
- Setting
- Resetting
Gated D Latch: value set to D if Write Enable (WE) is 1
Flip-Flop: The value D latches changes immediately which causes problems with finite state machines, the Flip-Flip ensures that the change takes after the current clock cycle.
- The current state can be read throughout the current clock cycle
- Next state is written at the beginning of the next clock cycle (and does not affect the current state)
- Example: master/slave D-latch
ALU #
Arithmetic Logic Unit
Control Unit #
Central Processing Unit (CPU) : The central part of any computer
Register : Extra temporary storage
General Purpose Registers (GPRs) : Registers that can be used by programs
Special Purpose Registers (SPRs) : Registers with a special purpose
Instruction Register (IR) : SPR that stores the current instruction
Program Counter (PC) : SPR that stores the address in memory of the instruction being executed
ISA (Instruction Set Architecture) #
- Operate: +-*!
- Data movement: memory
- Control: %$
Vonn Neumann Model #
- Program & data stored in memory
- Sequential instructions
Operating Systems #
Goals:
- Resource management: memory, I/O, CPU usage
- Convenient interface: TRAP instructions
I/O #
Privilage & priority #
- Privilage: What is the software allowed to do?
- User programs aren't allowed to access to the operating system
- Priority: Which software is more urgent to execute?
- High priority:
- Power iterruption
- Keyboard input
- User programs: lowest level
- High priority:
Processor Status Register (PSR) #
- PSR[15] Privilage (0 = supervisor, 1 = unprivilged)
- PSR[10:8] Priority level (PL) (0 = lowest, 7 = highest)
- PSR[2:0] Condition codes
Memory #
System space x0000 - x2FFF: Requires supervisor privilege to access, contains operating system.
User space x3000 - XFDFF: User programs are executed here, no supervisor privilage required.
Memory mapped-IO xFE00 - xFFFF: Not actual memory but mapped to special registers. The advantage of memory mapped I/O is that no extra instructions are required to control I/O devices.
Input & output (I/O) #
- Polling: processor checks if ready bit is set so it knows when it is time to read the device register
- Interrupt-driven I/O: An I/O device can force the running program to stop (interrupt)
- Only interrupts with a higher priority than the current process will interrupt it.
Keyboard #
- Keyboard Data Register (KBDR): contains the character pressed
- Keyboard Status Register (KBSR): contains the ready bit
When a key is pressed, the ASCII code is set in the KBDR. KBSR read
Service Routines #
Aka. syscalls, LC-3 TRAP Routines
Trap table: stores locations of service routines RTI: Return from Trap or interrupt